Course Map

Resource	Learning Outcomes
Unit 1: Introduction to Computer Technology
Unit 1 Introduction Video	—
Unit 1 Learning Outcomes	1a List the major advances that have taken place in the history of computer technology (CLO 1) 1b List the basic elements in a computer block diagram (CLO 2) 1c Explain key trends in the computing industry (CLO 1)
1.1: History and Development of Computing Technology
Computer History	1a List the major advances that have taken place in the history of computer technology (CLO 1)
History of Computing Hardware	1a List the major advances that have taken place in the history of computer technology (CLO 1)
1.2: Components of a Computer
Personal Computer Hardware	1b List the basic elements in a computer block diagram (CLO 2)
Practice Drag and Drop: Parts of a Computer	1b List the basic elements in a computer block diagram (CLO 2)
1.3: The Role of Processor Performance
CPU and Processor Time Counter	1b List the basic elements in a computer block diagram (CLO 2)
Microprocessor Design and Performance	1b List the basic elements in a computer block diagram (CLO 2)
Computing Benchmarks	1b List the basic elements in a computer block diagram (CLO 2)
Amdahl's Law	1b List the basic elements in a computer block diagram (CLO 2)
Learning Activity: Amdahl's Law	1b List the basic elements in a computer block diagram (CLO 2)
1.4: From Early Computing to the Power Problem
The Need For A Radical New Type Of Computer Architecture	1c Explain key trends in the computing industry (CLO 1)
Modern Computing	1c Explain key trends in the computing industry (CLO 1)
Unit 1 Assessment
Unit 1 Assessment	1a List the major advances that have taken place in the history of computer technology (CLO 1) 1b List the basic elements in a computer block diagram (CLO 2) 1c Explain key trends in the computing industry (CLO 1)
Unit 2: Instructions: Hardware Language
Unit 2 Introduction Video	—
Unit 2 Learning Outcomes	2a Illustrate the hardware–software interface for executing a simple program statement (CLO 2) 2b Illustrate how high-level programs are translated into machine language using the process for a simple C program statement (CLO 2) 2c Convert an integer into binary and other base-n representations (CLO 4) 2d Convert a decimal number into its floating-point representation (CLO 4) 2e Explain the functions of the CPU in executing instructions, including fetching, decoding, executing, and storing results program (CLO 5) 2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.1: Computer Hardware Operations
Introduction to Programming Languages	2a Illustrate the hardware–software interface for executing a simple program statement (CLO 2) 2b Illustrate how high-level programs are translated into machine language using the process for a simple C program statement (CLO 2)
Machine Code	2b Illustrate how high-level programs are translated into machine language using the process for a simple C program statement (CLO 2)
The Machine Cycle	2a Illustrate the hardware–software interface for executing a simple program statement (CLO 2)
2.2: Number Representation in Computers
Introduction to Number Systems	2c Convert an integer into binary and other base-n representations (CLO 4)
More on Number Systems	2c Convert an integer into binary and other base-n representations (CLO 4) 2d Convert a decimal number into its floating-point representation (CLO 4)
Floating Points	2c Convert an integer into binary and other base-n representations (CLO 4) 2d Convert a decimal number into its floating-point representation (CLO 4)
Practice with Number Systems	2c Convert an integer into binary and other base-n representations (CLO 4)
Converting Decimal Numbers to Binary	2c Convert an integer into binary and other base-n representations (CLO 4)
Fractions	2c Convert an integer into binary and other base-n representations (CLO 4)
Practice Questions: Converting Numbers	2b Illustrate how high-level programs are translated into machine language using the process for a simple C program statement (CLO 2) 2c Convert an integer into binary and other base-n representations (CLO 4) 2d Convert a decimal number into its floating-point representation (CLO 4)
2.3: Instruction Representation
RISC and CISC	2e Explain the functions of the CPU in executing instructions, including fetching, decoding, executing, and storing results program (CLO 5)
MIPS Instructions	2e Explain the functions of the CPU in executing instructions, including fetching, decoding, executing, and storing results program (CLO 5) 2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.4: Logical and Arithmetic Instructions
MIPS Arithmetic Instructions	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.5: Control Instructions
MIPS Control Flow Instructions	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.6: Instructions for Memory Operations
MIPS Memory Instructions	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.7: Different Modes for Addressing Memory
Addressing Memory	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
First Program in MIPS Assembly	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
2.8: Intel and ARM Instructions
X86 Instructions	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
ARM Architecture	2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
Unit 2 Assessment
Unit 2 Assessment	2a Illustrate the hardware–software interface for executing a simple program statement (CLO 2) 2b Illustrate how high-level programs are translated into machine language using the process for a simple C program statement (CLO 2) 2c Convert an integer into binary and other base-n representations (CLO 4) 2d Convert a decimal number into its floating-point representation (CLO 4) 2e Explain the functions of the CPU in executing instructions, including fetching, decoding, executing, and storing results program (CLO 5) 2f Describe how a simple MIPS assembly language program executes step by step (CLO 2)
Unit 3: Fundamentals of Digital Logic Design
Unit 3 Introduction Video	—
Unit 3 Learning Outcomes	3a Describe the evolution of physical components used to implement Boolean logic in the design of digital processors and computers (CLO 3) 3b Construct a simple digital circuit from a given truth table or Karnaugh map (CLO 3) 3c Design a 4-bit adder (CLO 3) 3d Implement a simple sequential circuit from a given state diagram and state transition table (CLO 3)
3.1: Beginning Design: Logic Gates, Truth Table, and Logic Equations
Logic Gates	3a Describe the evolution of physical components used to implement Boolean logic in the design of digital processors and computers (CLO 3)
Ladder Logic	3b Construct a simple digital circuit from a given truth table or Karnaugh map (CLO 3)
Karnaugh Mapping	3b Construct a simple digital circuit from a given truth table or Karnaugh map (CLO 3)
3.2: Combinational Logic
Combinational Logic Functions	3c Design a 4-bit adder (CLO 3)
3.3: Flip-Flops, Latches, and Registers
Multivibrators	3d Implement a simple sequential circuit from a given state diagram and state transition table (CLO 3)
3.4: Sequential Logic Design
Sequential Circuits	3d Implement a simple sequential circuit from a given state diagram and state transition table (CLO 3)
3.5: Design of a Finite State Machine (FSM) to Control a Vending Machine
Finite State Automata	3d Implement a simple sequential circuit from a given state diagram and state transition table (CLO 3)
Unit 3 Assessment
Unit 3 Assessment	3a Describe the evolution of physical components used to implement Boolean logic in the design of digital processors and computers (CLO 3) 3b Construct a simple digital circuit from a given truth table or Karnaugh map (CLO 3) 3c Design a 4-bit adder (CLO 3) 3d Implement a simple sequential circuit from a given state diagram and state transition table (CLO 3)
Unit 4: Computer Arithmetic
Unit 4 Introduction Video	—
Unit 4 Learning Outcomes	4a Explain how integers and real numbers are represented in binary and floating-point formats (CLO 4) 4b Calculate the outputs of a 4-bit adder for given input values (CLO 3) 4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4) 4d Use half-adder blocks to implement the operation of a full adder (CLO 3)
4.1: Number Representation
Integers and the Representation of Real Numbers	4a Explain how integers and real numbers are represented in binary and floating-point formats (CLO 4) 4b Calculate the outputs of a 4-bit adder for given input values (CLO 3)
Floating Points Arithmetic	4a Explain how integers and real numbers are represented in binary and floating-point formats (CLO 4) 4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4)
4.2: Addition and Subtraction Hardware
Add and Subtract Blocks	4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4) 4d Use half-adder blocks to implement the operation of a full adder (CLO 3)
4.3: Multiplication
Binary Multipliers	4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4)
4.4: Division
Division	4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4)
Division Algorithm	—
Arithmetic for Computers	4b Calculate the outputs of a 4-bit adder for given input values (CLO 3) 4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4)
4.5: Floating Point Arithmetic in an x86 Processor
Extended Precision	4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4)
Unit 4 Assessment
Unit 4 Assessment	4a Explain how integers and real numbers are represented in binary and floating-point formats (CLO 4) 4b Calculate the outputs of a 4-bit adder for given input values (CLO 3) 4c Apply a 4-bit adder to perform multiplication, subtraction, and division (CLO 4) 4d Use half-adder blocks to implement the operation of a full adder (CLO 3)
Unit 5: Designing a Processor
Unit 5 Introduction Video	—
Unit 5 Learning Outcomes	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2) 5b Describe the organization and operation of a Von Neumann computer architecture (CLO 1) 5c Summarize the design of a simple MIPS processor (CLO 1) 5d Describe the basic operation of pipelining (CLO 6) 5e Describe different types of pipeline hazards (data, control, and structural) and their effects on performance (CLO 6) 5f Describe the approaches used to improve processor performance (CLO 5)
5.1: Von Neumann Architecture
The Von Neumann Architecture	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2) 5b Describe the organization and operation of a Von Neumann computer architecture (CLO 1)
Learning Activity: Instruction Execution Path	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2)
5.2: Simple MIPS Processor Components
An Introduction to Processor Design	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2) 5b Describe the organization and operation of a Von Neumann computer architecture (CLO 1)
5.3: Designing a Datapath for a Simple Processor
Datapaths	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2)
5.4: Alternative Approach to Datapath Design and Design of a Control for a Simple Processor
Processor Design Control	5c Summarize the design of a simple MIPS processor (CLO 1)
5.5: Pipelining and Hazards
Pipelining	5d Describe the basic operation of pipelining (CLO 6)
Pipelining Hazards	5e Describe different types of pipeline hazards (data, control, and structural) and their effects on performance (CLO 6)
Handling Data Hazards	5e Describe different types of pipeline hazards (data, control, and structural) and their effects on performance (CLO 6)
Handling Control Hazards	5e Describe different types of pipeline hazards (data, control, and structural) and their effects on performance (CLO 6)
5.6: Pipelined Processors
Parallelism	5f Describe the approaches used to improve processor performance (CLO 5)
Instruction-Level Parallelism	5f Describe the approaches used to improve processor performance (CLO 5)
Unit 5 Assessment
Unit 5 Assessment	5a Illustrate how the hardware components of a processor execute a simple operation (CLO 2) 5b Describe the organization and operation of a Von Neumann computer architecture (CLO 1) 5c Summarize the design of a simple MIPS processor (CLO 1) 5d Describe the basic operation of pipelining (CLO 6) 5e Describe different types of pipeline hazards (data, control, and structural) and their effects on performance (CLO 6) 5f Describe the approaches used to improve processor performance (CLO 5)
Unit 6: The Memory Hierarchy
Unit 6 Introduction Video	—
Unit 6 Learning Outcomes	6a Explain the principles of the memory hierarchy and the trade-offs between speed, cost, and capacity across different memory types (CLO 7) 6b Explain how cache memory is organized and optimized for performance (CLO 7) 6c Analyze the impact of cache memory on system efficiency using concepts like cache hits, misses, and replacement policies (CLO 7) 6d Explain how virtual memory extends physical memory to support the efficient execution of large programs (CLO 7)
6.1: Elements of Memory Hierarchy
The Basics of Memory Heirarchy	6a Explain the principles of the memory hierarchy and the trade-offs between speed, cost, and capacity across different memory types (CLO 7) 6b Explain how cache memory is organized and optimized for performance (CLO 7)
Practice Sorting: Compare Types of Memory	6a Explain the principles of the memory hierarchy and the trade-offs between speed, cost, and capacity across different memory types (CLO 7) 6b Explain how cache memory is organized and optimized for performance (CLO 7)
6.2: Cache Memory
Cache Organization	6b Explain how cache memory is organized and optimized for performance (CLO 7) 6c Analyze the impact of cache memory on system efficiency using concepts like cache hits, misses, and replacement policies (CLO 7)
Cache Memory Performance Optimization	6c Analyze the impact of cache memory on system efficiency using concepts like cache hits, misses, and replacement policies (CLO 7)
6.3: Main Memory and Virtual Memory
Virtual Memory	6d Explain how virtual memory extends physical memory to support the efficient execution of large programs (CLO 7)
Unit 6 Assessment
Unit 6 Assessment	6a Explain the principles of the memory hierarchy and the trade-offs between speed, cost, and capacity across different memory types (CLO 7) 6b Explain how cache memory is organized and optimized for performance (CLO 7) 6c Analyze the impact of cache memory on system efficiency using concepts like cache hits, misses, and replacement policies (CLO 7) 6d Explain how virtual memory extends physical memory to support the efficient execution of large programs (CLO 7)
Unit 7: Storage and I/O
Unit 7 Introduction Video	—
Unit 7 Learning Outcomes	7a Explain the role of the I/O subsystem in managing communication between the CPU, memory, and external devices (CLO 8) 7b Explain the role of interrupts and their types, such as programmable, maskable, and non-maskable (CLO 8) 7c Discuss storage and I/O devices, their performance measurement, and RAID technology (CLO 6, CLO 8)
7.1: I/O Devices
Introduction to I/O Subsystems	7a Explain the role of the I/O subsystem in managing communication between the CPU, memory, and external devices (CLO 8) 7b Explain the role of interrupts and their types, such as programmable, maskable, and non-maskable (CLO 8)
7.2: Connecting I/O Devices to the Processor
Interfaces and Buses	7a Explain the role of the I/O subsystem in managing communication between the CPU, memory, and external devices (CLO 8) 7b Explain the role of interrupts and their types, such as programmable, maskable, and non-maskable (CLO 8)
Practice Drag and Drop: Storage and I/O	7a Explain the role of the I/O subsystem in managing communication between the CPU, memory, and external devices (CLO 8) 7b Explain the role of interrupts and their types, such as programmable, maskable, and non-maskable (CLO 8)
7.3: Measuring Disk Performance
Hard Disk Drive Performance Characteristics	7c Discuss storage and I/O devices, their performance measurement, and RAID technology (CLO 6, CLO 8)
7.4: Redundant Array of Inexpensive Disks (RAID)
RAID	7c Discuss storage and I/O devices, their performance measurement, and RAID technology (CLO 6, CLO 8)
Unit 7 Assessment
Unit 7 Assessment	7a Explain the role of the I/O subsystem in managing communication between the CPU, memory, and external devices (CLO 8) 7b Explain the role of interrupts and their types, such as programmable, maskable, and non-maskable (CLO 8) 7c Discuss storage and I/O devices, their performance measurement, and RAID technology (CLO 6, CLO 8)
Unit 8: Parallel Processing
Unit 8 Introduction Video	—
Unit 8 Learning Outcomes	8a Explain the need for parallel architectures and multi-core processors in addressing performance limitations of sequential systems (CLO 9) 8b Apply Amdahl's and Gustafson's Laws to compute speedup for given tasks (CLO 9) 8c Describe different approaches to parallel computation (CLO 9) 8d Describe common challenges in transitioning from sequential to parallel execution (CLO 9) 8e Analyze cache coherence or memory consistency issues to determine bottlenecks (CLO 9)
8.1: The Reason for the Switch to Parallel Processing
Parallel Processing	8a Explain the need for parallel architectures and multi-core processors in addressing performance limitations of sequential systems (CLO 9)
Why Do We Need Parallel Architectures?	8a Explain the need for parallel architectures and multi-core processors in addressing performance limitations of sequential systems (CLO 9)
Multi-Core Chips	8a Explain the need for parallel architectures and multi-core processors in addressing performance limitations of sequential systems (CLO 9)
8.2: Limitations in Parallel Processing: Amdahl's Law
Limits and Costs of Parallel Programming	8b Apply Amdahl's and Gustafson's Laws to compute speedup for given tasks (CLO 9)
Parallel Performance: Amdahl vs. Gustafson	8b Apply Amdahl's and Gustafson's Laws to compute speedup for given tasks (CLO 9)
8.3: Shared Memory and Distributed Memory Multiprocessing
Parallel Architectures	8c Describe different approaches to parallel computation (CLO 9)
Parallel Models	8c Describe different approaches to parallel computation (CLO 9)
Practice Matching: Parallel Architecture	8c Describe different approaches to parallel computation (CLO 9)
8.4: Multicore Processors and Programming with OpenMP and MPI
Challenges of Parallel Processing	8c Describe different approaches to parallel computation (CLO 9) 8d Describe common challenges in transitioning from sequential to parallel execution (CLO 9)
From Sequential to Parallel	8d Describe common challenges in transitioning from sequential to parallel execution (CLO 9)
Cache Coherence	8d Describe common challenges in transitioning from sequential to parallel execution (CLO 9) 8e Analyze cache coherence or memory consistency issues to determine bottlenecks (CLO 9)
Memory Consistency	8e Analyze cache coherence or memory consistency issues to determine bottlenecks (CLO 9)
Unit 8 Assessment
Unit 8 Assessment	8a Explain the need for parallel architectures and multi-core processors in addressing performance limitations of sequential systems (CLO 9) 8b Apply Amdahl's and Gustafson's Laws to compute speedup for given tasks (CLO 9) 8c Describe different approaches to parallel computation (CLO 9) 8d Describe common challenges in transitioning from sequential to parallel execution (CLO 9) 8e Analyze cache coherence or memory consistency issues to determine bottlenecks (CLO 9)
Unit 9: Look Back and Look Ahead
Unit 9 Introduction Video	—
Unit 9 Learning Outcomes	9a Discuss basic laws applicable to computer performance (CLO 5, CLO 10) 9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
9.1: Theory and Laws
Topologies	9a Discuss basic laws applicable to computer performance (CLO 5, CLO 10)
9.2: Special Purpose Computing Architectures
GPU, Distributed, Grid, and Cloud Computing	9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
Distributed, Cloud, and Edge Architectures	9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
GPU and TPU	9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
RISC-V	9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
TOP500	9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
Practice Simulation: Special Architectures	9a Discuss basic laws applicable to computer performance (CLO 5, CLO 10) 9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
Unit 9 Assessment
Unit 9 Assessment	9a Discuss basic laws applicable to computer performance (CLO 5, CLO 10) 9b Describe examples of computer architecture for special-purpose computing architectures (CLO 5, CLO 10)
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