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CS401: Operating Systems

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Monitors and Condition Variables

Course Introduction

Course Syllabus

Unit 1: Introduction to Operating Systems

1.1: History of Operating Systems

What Is an Operating System?

History of Operating Systems

1.2: Operating System Structure

OS History, Services, and Structure

1.2.1: Abstract Computer Component Overview

Computer System Overview

1.2.2: Functional Overview

What Is an Operating System?

1.3: Different Operating Systems Overview

Different Operating Systems

1.3.1: 32-Bit vs. 64-Bit OS

32-bit and 64-bit Explained

32-bit and 64-bit Frequently Asked Questions

1.3.2: UNIX-based

The Unix Operating System: Mature, Standardized and State-of-the-Art

1.3.2.1: Linux (Ubuntu, Fedora, etc.)

What Is Linux?

1.3.2.2: Solaris

Solaris

1.3.3: Windows

Microsoft Windows

1.3.4: Mobile

iOS (Apple)

Android

Windows Phone

1.3.5: Real-Time

Introduction to Real-Time Systems

Introduction to Embedded and Real-Time Operating Systems

Real-time Operating Systems and Microkernels

Embedded System Software

VxWorks

QNX

Unit 2: Processes and Threads

2.1: Concurrency

Concurrency: Processes, Threads, and Address Spaces

Concurrency

2.2: Processes

Processes

Processes and Process Management

The Process Concept

2.3: Threads

A Brief Introduction to Threads

Threads and Concurrency

Threads

More on Threads

2.4: Context Switch

Context Switching

Context Switches

Processes and Threads

Putting the P in Threads

Unit 3: Synchronization

3.1: Synchronization: Relevance and Problems

Synchronization

Introduction to Synchronization

3.2: Race Conditions

Introduction to Race Conditions

3.3: Semaphores

Mutual Exclusion, Semaphores, Monitors, and Condition Variables

Semaphores

Java Semaphores

Programming Paradigms

Monitors and Condition Variables

Unit 4: CPU Scheduling

4.1: Scheduling General Objective

Thread Scheduling

CPU Scheduling

4.2: Goals

More on CPU Scheduling

4.3: Types

Types of CPU Scheduling

4.4: Algorithms

Scheduling Algorithms

Unit 4 Exercises and Assessment

CPU Scheduling Simulation Exercises

Unit 4 Assessment

Unit 5: Deadlock

5.1: Definition

Deadlock

Deadlock

5.2: Deadlock Prevention and Avoidance

Operating Systems

Banker's Algorithm Problem Set

5.3: Deadlock Detection and Recovery

Deadlock

Deadlock Simulation Lab

Unit 6: Memory Management

6.1: Overview of Memory Management

Memory Management

6.1.1: Memory Hierarchy

Overview of Memory Hierarchy

6.1.2: OS Interaction with Memory Levels

Paging

6.1.3: Virtual Memory

Virtual Memory

More on Virtual Memory

6.2: Allocating Memory

Memory Management

Memory Management Simulation

6.3: Memory Access

Segmentation

Intel Memory Management

The GDT

Paging and Memory Access

Unit 7: File System

7.1: Introduction to File Systems

File Systems and Disk Management

File Systems

7.2: File Allocation Methods

File Management

The File System

7.3: Disk Management Algorithms

File Systems and Disk Management

Queueing Models

Disk Scheduling

Unit 7 Activities

Disk Scheduling Simulation Lab

File System Simulation Lab

Disk Management Algorithms Exercises

Unit 8: Security

8.1: Introduction to Security

Introduction to Security

Protection and Security

More on Security

8.2: Malicious Software Overview

Malware: Viruses and Worms

Bots and Botnets

8.3: Security Techniques

Protection

Security Strategies

Security Techniques

Intrusion Detection and Prevention Systems

Unit 9: Networking

9.1: Introduction

Introduction to Networks

Computer Networking

More on Networking

9.2: Protocol Architecture

Layering and the Link Layer

9.3: The Reference Models

Computer Networking

TCP/IP Networking

An Overview of TCP/IP Protocols and the Internet

Animation of the OSI Model

Introduction to the OSI Model

9.4: Network Intrusion Detection

Intrusion Detection and Prevention Systems

Study Guide

CS401 Study Guide

Course Feedback Survey

Course Feedback Survey

Certificate Final Exam

CS401: Certificate Final Exam

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CS401: Operating Systems
Unit 3: Synchronization
3.3: Semaphores
Monitors and Condition Variables

Monitors and Condition Variables

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Saylor Academy © 2010-2025 except as otherwise noted. Excluding course final exams, content authored by Saylor Academy is available under a Creative Commons Attribution 3.0 Unported license. Third-party materials are the copyright of their respective owners and shared under various licenses. See detailed licensing information. Saylor Academy®, Saylor.org®, and Harnessing Technology to Make Education Free® are trade names of the Constitution Foundation, a 501(c)(3) organization through which our educational activities are conducted.