Pipelined Processor Datapaths

Watch this lecture, which explains how to design a pipelined MIPS processor. The previous video introduced pipelining as a way to increase performance. It showed how hazards can limit the performance improvement of a pipeline datapath. This video lecture completes the design of a pipeline datapath. Ignoring hazards, the lecturer designs a control for the pipeline, integrates all the components including the control with the pipeline, and then considers the behavior with respect to hazards.


Source: Anshul Kumar and the Indian Institute of Technology, Delhi, https://www.youtube.com/watch?v=SL_djmTegqc
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Last modified: Tuesday, 14 July 2020, 12:15 AM