Interfaces and Buses

Watch this lecture for an introduction to the interconnection schemes used for the input/output (I/O) subsystem of a computer system. This is the second of two lectures on I/O devices. The previous lecture looked at the connection of memory, either cache or main memory, with peripheral devices and the transfer and transformation of data between them. This video lecture analyzes alternative interconnection schemes with a focus on buses. Also, it discusses protocols for the data that flows on the buses: asynchronous and synchronous. A synchronous protocol uses a clock to time sequence the information flow. An asynchronous protocol does not use a clock; the signal carries the sequencing information. Then, the lecture shows a performance comparison of two different protocols.

Be aware that the last example on this resource has an error. When finding the BW, it says 256 x 4 x 1/14400. It should be 256 x 8 x 1/14400. A byte is 8 bits.


Source: Anshul Kumar and the Indian Institute of Technology, Delhi, https://www.youtube.com/watch?v=myVbSSyZtr4
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Last modified: Tuesday, 14 July 2020, 9:47 PM