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CS301: Computer Architecture

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Programming on Parallel Machines

Course Introduction

Course Syllabus

Unit 1: Introduction to Computer Technology

1.1: Introduction to Computer Processors

Computer History

History of Computing Hardware (1960–Present)

1.2: Components of a Computer

Personal Computer Hardware

1.3: The Role of Processor Performance

CPU and Processor Time Counter

Microprocessor Design and Performance

Computing Benchmarks

Amdahl's Law

1.4: The Power Problem

The Need For A Radical New Type Of Computer Architecture

1.5: The Switch to Parallel Processing

Parallel Computing Landscape

1.6: Case Study: A Recent Intel Processor

Data Types, Operators, and Variables

Unit 1 Assessment

Unit 1 Assessment

Unit 2: Instructions: Hardware Language

2.1: Computer Hardware Operations

Introduction to Programming Languages

Machine Code

The Machine Cycle

2.2: Number Representation in Computers

Introduction to Number Systems

More on Number Systems

Floating Points

Practice with Number Systems

Converting Decimal Numbers to Binary

Another Way to Convert from Decimal to Binary

Fractions

2.3: Instruction Representation

MIPS Instructions

2.4: Logical and Arithmetic Instructions

MIPS Arithmetic Instructions

2.5: Control Instructions

MIPS Control Flow Instructions

2.6: Instructions for Memory Operations

MIPS Memory Instructions

2.7: Different Modes for Addressing Memory

Addressing Memory

MIPS Instruction Format

2.8: Case Study: Intel and ARM Instructions

X86 Instructions and ARM Architecture

Unit 2 Assessment

Unit 2 Assessment

Unit 3: Fundamentals of Digital Logic Design

3.1: Beginning Design: Logic Gates, Truth Table, and Logic Equations

Logic Design Principles

Logic Gates

Ladder Logic

Karnaugh Mapping

3.2: Combinational Logic

Combinational Logic Functions

3.3: Flip-Flops, Latches, and Registers

Multivibrators

3.4: Sequential Logic Design

Sequential Circuits

3.5: Case Study: Design of a Finite State Machine (FSM) to Control a Vending Machine

Finite State Automata

Unit 3 Assessment

Unit 3 Assessment

Unit 4: Computer Arithmetic

4.1: Number Representation

Floating Points

Integers and the Representation of Real Numbers

4.2: Addition and Subtraction Hardware

Add and Subtract Blocks

4.3: Multiplication

Binary Multipliers

Arithmetic Circuits

4.4: Floating Point Arithmetic

Floating Point Arithmetic and Error Analysis

4.5: Division

Division

Arithmetic for Computers

4.6: Case Study: Floating Point Arithmetic in an x86 Processor

Extended Precision

Unit 4 Assessment

Unit 4 Assessment

Unit 5: Designing a Processor

5.1: Von Neumann Architecture

The Von Neumann Architecture

5.2: Simple MIPS Processor Components

An Introduction to Processor Design

5.3: Designing a Datapath for a Simple Processor

Datapaths

5.4: Alternative Approach to Datapath Design and Design of a Control for a Simple Processor

Processor Design Control

5.5: Pipelining and Hazards

Pipelined Processor Design

5.6: Pipelined Processors

Pipelined Processor Datapaths

5.7: Instruction-Level Parallelism

Understanding Parallelism

Instruction-Level Parallelism

Unit 5 Assessment

Unit 5 Assessment

Unit 6: The Memory Hierarchy

6.1: Elements of Memory Hierarchy and Caches

The Basics of Memory Hierarchy

Sequential Computer Architecture

6.2: Cache Architectures and Improving Cache Performance

Cache Organization

Programming Strategies for High Performance

6.3: Main Memory and Virtual Memory

Virtual Memory

6.4: Performance Tuning

Parallel Computing

Unit 6 Assessment

Unit 6 Assessment

Unit 7: Storage and I/O

7.1: I/O Devices

Introduction to I/O Subsystems

7.2: Connecting I/O Devices to the Processor

Interfaces and Buses

7.3: Measuring Disk Performance

Hard Disk Drive Performance Characteristics

7.4: Redundant Array of Inexpensive Disks (RAID)

RAID

Unit 7 Assessment

Unit 7 Assessment

Unit 8: Parallel Processing

8.1: The Reason for the Switch to Parallel Processing

Multi-Core Chips

8.2: Limitations in Parallel Processing: Amdahl's Law

Introduction to Parallel Computer Architecture

Parallelism and Performance

Limits and Costs of Parallel Programming

8.3: Shared Memory and Distributed Memory Multiprocessing

Multiprocessing

8.4: Multicore Processors and Programming with OpenMP and MPI

Parallel Programming

Programming on Parallel Machines

Unit 8 Assessment

Unit 8 Assessment

Unit 9: Look Back and Look Ahead

9.1: Theory and Laws

Topologies

9.2: Special Purpose Computing Architectures

GPU, Distributed, Grid, and Cloud Computing

TOP500

9.3: Case Study: Special Purpose Applications of Parallel Computing

Linear Algebra in High-Performance Computing

Unit 9 Assessment

Unit 9 Assessment

Course Feedback Survey

Course Feedback Survey

Certificate Final Exam

CS301: Certificate Final Exam

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CS301: Computer Architecture
Unit 8: Parallel Processing
8.4: Multicore Processors and Programming with OpenMP and MPI
Programming on Parallel Machines

Programming on Parallel Machines

Completion requirements

Click Programming-on-Parallel-Machines.pdf link to view the file.

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Saylor Academy © 2010-2025 except as otherwise noted. Excluding course final exams, content authored by Saylor Academy is available under a Creative Commons Attribution 3.0 Unported license. Third-party materials are the copyright of their respective owners and shared under various licenses. See detailed licensing information. Saylor Academy®, Saylor.org®, and Harnessing Technology to Make Education Free® are trade names of the Constitution Foundation, a 501(c)(3) organization through which our educational activities are conducted.